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Freescale Semiconductor /MK61F15WS /DDR /CR38

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Interpret as CR38

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PDNCS0RESERVED 0PUPCS0RESERVED 0PWRCNT0RESERVED

Description

DDR Control Register 38

Fields

PDNCS

OCD Pull Down adjustment Chip Select
RESERVED

Reserved
PUPCS

OCD Pull Up adjustment Chip Select
RESERVED

Reserved
PWRCNT

Port 0 Write Count
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data